System-In-Package type integration has suffered from thermal management and bandwidth issues, not to mention floor-planning, design, and testing concerns. IIC’s innovative Quilt Packaging technology alleviates all these limitations and can deliver monolithic-like device performance while achieving true heterogeneous integration.
Innovative Chip Packaging
Indiana Integrated Circuits, LLC (IIC) was created by two University of Notre Dame researchers for the purpose of commercializing a revolutionary microchip interconnect and packaging technology, Quilt Packaging (QP). Working closely with customers and partners, the IIC team assists in the implementation of QP into existing process flows, performs proof-of-concept prototyping, and develops application-specific solutions for licensees.
IIC’s patented technology delivers unprecedented microchip integration options to designers, enabled by the ultra-low-loss characteristics of Quilt Packaging interconnections, sub-micron chip-to-chip alignment, and chip-to-chip gaps as small as five microns. In addition to enabling an entirely new class of system designs, utilizing QP can result in significant cost reduction by partitioning large, poorer-yielding chips and “reconstituting” them from smaller, higher yielding chips, without reducing performance or functionality. Improvements in time-to-market, power consumption, form-factor and yield are possible with adoption of QP, as well as an increased flexibility in mixing and matching IP cores and existing designs.
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